Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Collaborate with Design, Architecture, Process Technology, and Silicon Engineering teams to develop new product bring-up, verification, characterization, qualification strategies, and manufacturing test solutions for new High Performance Computing (HPC) products in advanced manufacturing technologies.
Verify test solutions on pre-silicon models (i.e., simulation or emulation).
Develop and validate test programs on Automated Test Equipment (ATE) platforms in preparation for High Volume Manufacturing, working with ATE Vendor and internal cross-functional teams.
Support product sustain, including volume data analytics, test time, and yield improvements. Assess test escapees and Return Merchandise Authorization (RMA), localize failures, implement containment measures in the manufacturing test flow, and partner with manufacturing, quality and reliability teams to implement root cause corrective actions.
Requirements: Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
Candidates will typically have 5 years of experience with industry-standard tools, languages and methodologies relevant to the development of silicon-based ICs and chips.
Experience in developing or integrating ATE hardware/software test methods for functional IPs like DDR, PCIe, or Telemetry.
Experience in pre-silicon verification, test content generation/integration, and post-silicon enabling.
Experience in Python, Java, or C/C++.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
Experience with CPU/GPU SoC architecture, design, validation, and debug.
Experience in hardware description languages and RTL debug.
Familiarity with Synopsys, Cadence, or Mentor verification platforms.
Ability to venture into and improve, all aspects of post-silicon testing from definition to realization.
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