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Google Israel

    דרושים Google Israel

    המשרות שלנו (37)
    תחום עיסוק
    חומרה / תוכנה
    כמות עובדים
    מעל 100
    שנת הקמה
    1998

    עוד עלינו

    משרות Google Israel

    הצעות עבודה
    מתוך 3
    נמצאו 22 משרות
    דיווח על תוכן לא הולם או מפלה
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    תיאור
    שליחה
    תודה על שיתוף הפעולה
    מודים לך שלקחת חלק בשיפור התוכן שלנו :)
    Location: Haifa and Merkaz
    Job Type: Full Time
    Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
    As a Design Verification Engineer, you will work as part of a Research and Development team building verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify digital designs. You will collaborate with design and verification engineers in active projects and perform verification. You will be responsible for the full life-cycle of verification which can range from verification planning, test execution or collecting and closing coverage.

    The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

    We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
    Responsibilities
    Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
    Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
    Identify and write all types of coverage measures for stimulus and corner-cases.
    Debug tests with design engineers to deliver functionally correct design blocks.
    Apply close coverage measures to identify verification holes and to show progress towards tape-out.
    Requirements:
    Minimum qualifications:
    Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
    1 year of experience creating and using verification components and environments in standard verification methodology.
    Experience verifying digital logic at Register Transfer Level (RTL) level using SystemVerilog or Specman/E for Field Programmable Gate Arrays or ASICs.

    Preferred qualifications:
    Masters degree in Electrical Engineering, Computer Science, or a related field.
    Experience with Universal Verification Methodology (UVM), SystemVerilog, or other scripting languages (e.g., Python, Perl, Shell, Bash, etc.).
    Experience with CPU implementation, assembly language or compute SOCs.
    .המשרה מיועדת לנשים ולגברים כאחד
     
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    הגשת מועמדות
    עדכון קורות החיים לפני שליחה
    113539
    שירות זה פתוח ללקוחות VIP בלבד
    דיווח על תוכן לא הולם או מפלה
    מה השם שלך?
    תיאור
    שליחה
    תודה על שיתוף הפעולה
    מודים לך שלקחת חלק בשיפור התוכן שלנו :)
    Location: Haifa and Merkaz
    Job Type: Full Time
    Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

    As an SoC Design Verification Engineer, you will work as part of a Research and Development team, and your responsibilities will include building verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will use your design and verification expertise to verify complex digital designs. You will collaborate closely with design and verification engineers in active projects and perform verification. Using your UVM and SystemVerilog coding and problem-solving skills, you'll build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will be responsible for the full lifecycle of verification which can range from verification planning, test execution or collecting and closing coverage.

    The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

    We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

    Responsibilities
    Verify designs using verification techniques and methodologies.
    Work cross-functionally to debug failures and verify the functional correctness of the design.
    Provide test plans, including verification strategy, environment, components, stimulus, checks, and coverage, and ensure documentation is easy to use.
    Requirements:
    Minimum qualifications:
    Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
    1 year of experience with using verification components and environments in standard verification methodology.

    Preferred qualifications:
    Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture, or a related field.
    Experience creating and using verification components and environments in standard verification methodology.
    Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems)
    Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or ASICs.
    .המשרה מיועדת לנשים ולגברים כאחד
     
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    הגשת מועמדות
    עדכון קורות החיים לפני שליחה
    113536
    שירות זה פתוח ללקוחות VIP בלבד
    מתוך 3