Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
Our mission at Google System Infrastructure is to build high-performance computing System-on-a-Chip (SoC) for Google services and for Google Cloud customers, by solving real-world business challenges of performance, cost, and scale, utilizing unique hardware, software, and system solutions.
As an SoC Debug and Monitoring Architect, you'll work closely with internal system teams and external customers to develop a comprehensive understanding of debug requirements as well as monitoring requirements and define methods and technologies to debug Googles SoCs and connect to the Cloud monitoring infrastructure. You will also work closely with the Engineering teams to drive the optimal balance between performance, features, power, schedule, and cost.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Work with Platform, Software, and CPU Architecture teams to define the debug, and monitoring of the custom core and implement ARM debug architecture features.
Work with the Silicon Design teams to define the required debug features.
Work on ARMs debug and monitoring philosophy and architecture, and configure it to Google SoC needs.
Utilize ARM infrastructure to architect a solution for debug and monitoring.
Requirements: Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Science or relevant technical field or equivalent practical experience.
Candidates will typically have 5 years of experience with ARM Debug and Monitoring technologies
Experience with architecting Debug and Monitoring solutions for CPUs or SOCs.
Preferred qualifications:
5 or more cycles of relevant industry experience (debug) with technical leadership.
Experience with 5 or more cycles of SoC architecture and systems.
Experience with 2 or more cycles of Servers SOC debug architecture.
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