Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.The AI and Infrastructure team is redefining whats possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Define, develop and execute post-silicon validation content on both pre-silicon setups and real silicon platforms in the lab.
Drive silicon from being a chip towards becoming a product.
Debug and investigate issues along cross-functional teams such as Firmware, Software, Design, Design Verification (DV), Architecture and multiple production teams.
Provide a quality functional coverage for Google designs.
Design, implement, and maintain validation tests using scripting and programming languages (e.g., Python, C/C++) to verify SmartNIC functionality and performance.
Requirements: Minimum qualifications:
Bachelor's degree in Electrical/Computer Engineering, Computer Science, a related field, or equivalent practical experience.
3 years of experience with functional tests for silicon validation (i.e., writing in C or C++) or developing firmware, and embedded software.
Experience with silicon bring-up, functional validation, characterizing, and qualifying silicon.
Experience with SoC architecture, including boot flows.
Preferred qualifications:
Experience validating key SmartNIC features, including Ethernet interface (SerDes, MAC + PCS) PCIe high-speed interface, network protocols (e.g., Ethernet, RDMA, NVMe), packet processing, data path, packet buffering, and embedded processors/firmware.
Experience with hardware prototyping, including hardware/software integration (i.e., pre-silicon use of emulation, software-based test, and diagnostics development).
Experience with board schematics, layout, and debug methodologies using lab equipment.
Experience in SmartNIC, Network Processor, or high-speed Networking/Storage ASIC validation.
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