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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Google Israel
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Silicon Validation Lead at Google Cloud, you will validate Google's custom silicon solutions that power cloud infrastructure bringing the quality level. You will lead a team of engineers responsible for validating the functionality, performance, and power efficiency of chips designed specifically for Google Cloud services. Your knowledge in post-silicon validation will be essential in identifying and resolving issues before they impact the customers, ensuring a seamless and high-performance cloud experience.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities
Build and mentor a high-performing team of silicon validation engineers, and foster a culture of collaboration, innovation, and technical excellence.
Develop and execute comprehensive validation plans for Google's custom silicon, covering functional, performance, power, and reliability aspects.
Design and build scalable validation test infrastructure, including hardware setups, software frameworks, and automation tools.
Lead the debug and resolution of silicon issues, collaborate with cross-functional teams such as design, architecture, software, and firmware.
Analyze validation data to identify trends, root causes, and opportunities for improvement in silicon quality and reliability.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
8 years of experience in silicon validation or a related field, with leading teams, and delivering successful projects.
8 years of experience of silicon validation methodologies, tools, and techniques.

Preferred qualifications:
Experience with Field-Programmable Gate Array (FPGA) prototyping, emulation, or simulation platforms.
Excellent written and verbal communication skills.
Ability to convey technical concepts to audiences.
Ability to lead and inspire technical teams, drive results, and build cross-functional relationships.
.המשרה מיועדת לנשים ולגברים כאחד
 
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הגשת מועמדות
עדכון קורות החיים לפני שליחה
102107
שירות זה פתוח ללקוחות VIP בלבד
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Google Israel
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You will contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google System Infrastructure build the cloud for Google services and for Google Cloud customers, by solving world business test of performance, cost, and scale, utilizing unique hardware, software, and system solutions.Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Plan the verification strategy, identify the platform to validate reasoning components.
Define the test plan along with the strategy with stakeholders along with the sign off exit criteria.
Plan and execute the Verification of Internet Protocols (IPs) using Dynamic Verification and Formal Verification.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
Experienced in managing Design Verification (DV) team.
Experience with verifying units using Formal and Design Verification methodologies.
Experience in verification methodologies, tools, and techniques.
Experience in leading technical teams and building cross-functional relationships.

Preferred qualifications:
Master's degree or PhD in Electrical Engineering or Computer Science.
Experience in working with one or more formal verification tools (e.g., JasperGold, VC Formal, Questa Formal, 360-DV).
Experience with verification techniques, and full verification life cycle.
Experience in leading teams and delivering projects.
Excellent communication skills, with the ability to present technical concepts to audiences.
.המשרה מיועדת לנשים ולגברים כאחד
 
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הגשת מועמדות
עדכון קורות החיים לפני שליחה
102090
שירות זה פתוח ללקוחות VIP בלבד
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Google Israel
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As the DFT Senior Engineer, you will play a crucial role in DFT Architecture and DFT design, and support devices of extreme complexity to production. You will be responsible for providing technical leadership in DFT, developing flows, automation, and methodology, planning DFT activities, tracking the DFT quality matrix throughout the project lifecycle, and providing sign-off DFT to tapeout.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities
Lead and execute activities in the design, implementation, and verification of DFT solutions for large-scale ASICs.
Develop DFT strategy and architecture, including hierarchical DFT, Memory Built-In Self Test (MBIST), and Automatic Test Pattern Generation (ATPG).
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT requirements are met and mutual dependencies are managed.
Manage the DFT team's workload and deliverables, provide technical leadership and guidance to the team.
Lead DFT execution of a silicon project - planning, execution, tracking, quality, and signoff.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
8 years of experience in Automatic Test Pattern Generation (ATPG) methods.
4 years of people management experience developing employees.
Experience with multiple projects in DFT design and verification, DFT specification, definition, architecture, and insertion.
Experience with DFT techniques and tools, ASIC DFT synthesis, simulation, and verification flow.
Experience in leading DFT activities throughout an ASIC development flow.

Preferred qualifications:
Master's degree in Electrical Engineering or a related field.
Experience in JTAG and iJTAG protocols and architectures.
Experience in post-silicon test or product engineering.
Experience in SoC cycles, silicon bring-up, and silicon debug activities.
Knowledge of fault modeling techniques.
.המשרה מיועדת לנשים ולגברים כאחד
 
Show more...
הגשת מועמדות
עדכון קורות החיים לפני שליחה
102144
שירות זה פתוח ללקוחות VIP בלבד
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Google Israel
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google System Infrastructure build the cloud for Google services and for Google Cloud customers, by solving world business test of performance, cost, and scale, utilizing unique hardware, software, and system solutions.The ML, Systems & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities
Plan the verification of digital design blocks by understanding the design specification, and interacting with design engineers to identify important verification scenarios.
Lead a team of chip engineers. Plan tasks, allocate people, and hold verification design/code reviews.
Perform code development for critical verification features and capabilities.
Work with system, software, design, and physical implementation stakeholders to make technical decisions and represent project status throughout the development process.
Lead design verification efforts and work with external and internal partners.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
5 years of experience in technical leadership, leading project teams, or setting technical direction.
Experience in managing Design Verification (DV) team.
Experience in verification methodologies, tools, and techniques.
Experience creating chip or subsystem design verification strategies and plans.

Preferred qualifications:
Master's degree or PhD in Electrical Engineering or Computer Science, or a related field.
Experience with verification techniques, and full verification life cycle.
Experience in verification of IP/SoC/ASIC.
Experience with Universal Verification Methodology (UVM), SystemVerilog, or other scripting languages (e.g., Python, Perl, Shell, Bash, etc.).
Experience with ARM instruction set architecture or processor microarchitecture.
Experience in leading teams and delivering projects.
.המשרה מיועדת לנשים ולגברים כאחד
 
Show more...
הגשת מועמדות
עדכון קורות החיים לפני שליחה
102119
שירות זה פתוח ללקוחות VIP בלבד
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Google Israel
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities
Develop and execute comprehensive validation plans for Google's custom silicon, covering functional, performance, power, and reliability aspects.
Design and build scalable validation test infrastructure, including hardware setups, software frameworks, and automation tools on Emulation and/or FPGA platforms.
Lead the debugging and resolution of complex silicon issues, collaborating with cross-functional teams such as design, architecture, software, and firmware.
Analyze validation data to identify trends, root causes, and opportunities for improvement in silicon quality and reliability.
Build and mentor a high-performing team of silicon validation engineers, fostering a culture of collaboration, innovation, and technical excellence.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
8 years of experience in silicon validation or a related field.
Experience in leading technical teams and build cross-functional relationships.
Experience in silicon validation methodologies, tools, and techniques, including hardware setups, and automation tools on Emulation or FPGA platforms.

Preferred qualifications:
Experience with Field-Programmable Gate Array (FPGA) prototyping, Hardware Emulation (ZeBu Server, Palladium, Veloce), or simulation platforms.
Knowledge of cloud computing technologies and architectures, including data centers, networking, and storage.
Familiarity with hardware description languages (e.g., Verilog, VHDL) and hardware verification methodologies (e.g., UVM, SystemVerilog).
Excellent communication skills, with the ability to convey technical concepts to diverse audiences.
.המשרה מיועדת לנשים ולגברים כאחד
 
Show more...
הגשת מועמדות
עדכון קורות החיים לפני שליחה
102117
שירות זה פתוח ללקוחות VIP בלבד
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