Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Collaborate with Architecture, Design and Verification teams to develop new product bring-up, validation, characterization, and qualification strategies and manufacturing test solutions for new High Performance Computing (HPC) products in advanced process technologies.
Verify test solutions on pre-silicon models (simulation or emulation) and develop ATE test modules, DC tests, binning, production and characterization flows.
Develop and validate test programs on ATE platforms for New Product Integration (NPI) in preparation for High Volume Manufacturing (HVM), working with ATE vendors.
Support product sustainability, including volume data analysis of screening and characterization data, test time and yield improvements, assess test escapees and Return Merchandise Authorizations (RMAs), localize failures, implement containment measures and partner with design, manufacturing, quality and reliability teams to root cause and implement corrective actions.
Develop tools, flows and methodologies to continuously improve and automate the testing.
Requirements: Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
5 years of experience in design, test, manufacturing, or process engineering.
Experience in pre-silicon validation, test content generation, ATE program development, and post-silicon enabling from NPI through HVM.
Experience in ASIC test methodologies (e.g., MBIST, ATPG, DFT, SERDES, and sensors).
Experience in Python, Java, C# or C/C++ and Advantest or Teradyne ATE platforms.
Preferred qualifications:
Experience in creating end-to-end manufacturing test strategies for PCBA and systems that cover structural through functional and system tests.
Experience in ATE hardware design and proliferation: load boards/probe cards, handler kits, sockets, and thermal control solutions.
Experience in developing or integrating manufacturing test hardware using electrical and thermo-mechanical components.
Experience in developing automations for pre-silicon verification and post-silicon test-generation/test-program domains.
Experience with CPU/GPU SoC architecture, design, validation and debug.
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