דרושים » הנדסה » Senior Silicon Validation Engineer, Hardware

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לפני 10 שעות
Google Israel
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities
Define, develop, and execute post-silicon validation content on both pre-silicon and real silicon platforms.
Drive silicon from being a chip towards becoming a product.
Debug and investigate issues along cross-functional teams such as Firmware, Software, Design, DV, - ARCH and multiple production teams.
Provide a quality functional coverage for Google designs.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical/Computer Engineering, Computer Science, related field, or equivalent practical experience.
5 years of experience in silicon bring-up, functional validation, characterizing, and qualifying silicon.
Experience in C/C++, and with functional tests for silicon validation or developing firmware/embedded software.
Experience with SoC architecture, including boot processes and flows.
Experience with AArch64 architecture, ARMs exception model, and memory management concepts.

Preferred qualifications:
Experience with bare-metal applications and random instruction testing tools.
Experience with Linux kernel (building and configuring Linux kernels for embedded systems), and understanding of kernel internals: virtual memory, interrupt handling, device drivers, etc.
Experience with scripting (e.g. Python) for automation development.
Experience with hardware prototyping, including hardware/software integration (e.g., pre-silicon use of emulation, software-based test, and diagnostics development).
Experience with board schematics, layout, and debug methodologies using lab equipment.
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 10 שעות
Google Israel
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will be responsible for ensuring that the Systems-on-Chip (SoCs) meet the power, thermal, and performance goals. You will play a critical role in the pre and post-silicon validation phases, collaborating with cross-functional teams to identify, debug, and optimize SoC behavior in use cases, as well as validating the IPs protection mechanism.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities
Contribute to developing and improving post-silicon test content that exercises both IP and SoC levels workloads and other compute-intensive scenarios.
Collaborate with architecture, design, and firmware teams to define comprehensive validation plans for SoC features, focusing on power consumption, thermal management, sensors behavior, and performance metrics.
Work with design and firmware teams to propose and implement solutions for optimizing SoC power efficiency and performance, including tuning core-to-memory latencies and bandwidth, power control loops, thermal control loops, etc.
Develop and maintain automated test scripts and frameworks (e.g., Python) to improve validation efficiency and coverage.
Participate in early silicon bring-up and platform bring-up activities, ensuring the stability and functionality of high-power multi-core SoCs.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
5 years of experience in post-silicon validation, with power and performance characterization.
Experience validating multi-core CPU/GPU/APU architectures.
Experience in programming languages such as C, C++, and Python for scripting and automation.
Experience with lab equipment such as oscilloscopes, logic analyzers, power meters, and thermal chambers.
Experience with SoC architecture, including interconnects, memory hierarchy, cache coherency, and power management concepts.

Preferred qualifications:
Experience with embedded systems programming (e.g., bare-metal, RTOS, kernel, driver programming).
Experience with version control systems (e.g., Git).
Excellent debugging and root-causing skills for hardware/software issues.
Excellent analytical, problem-solving, and communication skills.
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דיווח על תוכן לא הולם או מפלה
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תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 10 שעות
Google Israel
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a SERDES/PCIe Silicon Validation Engineer, you will take ownership on characterization of SERDES analog IPs provided by external vendors. Your job is to assure that the IP is meeting Google high standards. You will work closely with different multi-functional teams within the Silicon organization, as well as external vendors.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities
Perform thorough Lab characterization/Validation of Serializer/Deserializer (SERDES) IPs, such as PCIeG6 PHYs.
Write Inhouse tools/scripts to characterize the IP.
Manage bench test, debug, and characterization of analog/mixed signal on-chip circuitry (PLLs, Clocks, Data Converters and various I/O Interfaces).
Manage the development of benchtop electrical tests exercising on-chip circuitry through a combination of Joint Test Action Group (JTAG), Universal Asynchronous Receiver/Transmitter (UART), Serial Peripheral Interface (SPI), and other analog interfaces.
Draft and execute scripts to automate tests, extract results, and generate reports using database and investigative tools.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
5 years of experience working with PLLs, PCIe, SerDes IPs.
Experience with lab automation software such as Python, and Matlab.
Experience with SerDes Debug.
Experience working with lab equipment such as Bidirectional Encoder Representations from Transformers (BERT), real-time scopes, Spectrum Analyzers, Vector Network Analyzers (VNA), or protocol analyzers.
Experience with board design and debugging.

Preferred qualifications:
Experience in PCIe compliance measurements using high-end equipment (e.g., Analyzer, Exerciser).
Experience in lab equipment for PCIe testing (physical or protocol level).
Knowledge of Tx/Rx equalization techniques and adaptation.
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 10 שעות
Google Israel
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Senior SoC Design Verification Engineer, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.

As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems).
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.

Preferred qualifications:
Master's or PhD degree in Electrical Engineering.
Experience with verification techniques, and the full verification life cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with ASIC standard interfaces and memory system architecture.
Experience in 4 or more SOC cycles.
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 10 שעות
Google Israel
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, and Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities
Develop and execute comprehensive validation plans for Google's custom silicon, covering functional, performance, power, and reliability aspects.
Design and build scalable validation test infrastructure, including hardware setups, software frameworks, and automation tools on Emulation or FPGA platforms.
Lead the debugging and resolution of silicon issues, collaborating with cross-functional teams such as design, architecture, software, and firmware.
Analyze validation data to identify trends, root causes, and opportunities for improvement in silicon quality and reliability.
Build and mentor a high-performing team of silicon validation engineers, fostering a culture of collaboration, innovation, and technical excellence.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
8 years of experience in silicon validation or a related field.
Experience in leading technical teams and build cross-functional relationships.
Experience in silicon validation methodologies, tools, and techniques, including hardware setups, and automation tools on Emulation or FPGA platforms.

Preferred qualifications:
Experience with Field-Programmable Gate Array (FPGA) prototyping, Hardware Emulation (e.g., ZeBu Server, Palladium, Veloce), or simulation platforms.
Knowledge of cloud computing technologies and architectures, including data centers, networking, and storage.
Familiarity with hardware description languages (e.g., Verilog, VHDL) and hardware verification methodologies (e.g., UVM, SystemVerilog).
Excellent communication skills, with the ability to convey technical concepts to audiences.
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 10 שעות
Google Israel
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a CPU Design Verification Engineer, you will work as part of a Research and Development team building verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify complex digital designs. You will collaborate with design and verification engineers in active projects and perform verification. You will be responsible for the full lifecycle of verification which can range from verification planning, test execution, or collecting and closing coverage.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Apply close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
Experience creating and using verification components and environments in standard verification methodology.
Experience verifying digital logic at Register Transfer Level (RTL) level using SystemVerilog or Specman/E for Field Programmable Gate Arrays or ASICs.

Preferred qualifications:
Masters degree in Electrical Engineering or Computer Science.
Experience with Universal Verification Methodology (UVM), SystemVerilog, or other scripting languages (e.g., Python, Perl, Shell, Bash, etc.).
Experience with CPU implementation, assembly language, or compute SOCs.
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 10 שעות
Google Israel
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a CPU Design Verification Engineer, you will work as part of a Research and Development team, and you will build verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers in projects and perform direct verification. You'll build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full lifecycle of verification which can range from verification planning, test execution or collecting, and closing coverage.

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog/UVM, or Specman.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Lead coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
3 years of experience verifying digital logic at RTL level using SystemVerilog, or Specman/E for FPGAs or ASICs.
Experience verifying digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems).
Experience creating and using verification components and environments in standard verification methodology.

Preferred qualifications:
Masters degree in Electrical Engineering, Computer Science, or related field.
Experience with UVM, SystemVerilog, or other scripting languages (e.g. Python, Perl, Shell, Bash, etc.).
Experience with CPU implementation, assembly language, or compute System on a Chip (SOC).
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
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שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 10 שעות
Google Israel
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a CPU Workload Analysis Researcher within Google Cloud's MSCA organization, you will be integral to developing silicon solutions powering Google's direct-to-consumer products. You will join a Research and Development team focused on analyzing and profiling workloads requirements within the Google Cloud environment. Your role will involve conducting in-depth research on CPU optimization, feature development, and ML usages over compute platforms, contributing to identifying key areas of investment and future opportunities. This role offers a unique opportunity to perform groundbreaking research with a significant impact on both research methodologies and industry products, within the server chip architecture team. Your work will directly influence the next generation of hardware experiences for millions of Google users and Cloud customers.

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities
Plan and execute detailed analysis of CPU workloads within the Google Cloud infrastructure, analyze trends and map future requirements.
Collaborate closely with architecture and modeling owners to understand design specifications and identify critical scenarios related to CPU performance and efficiency.
Develop and implement custom workload generation tools and methodologies to simulate real-world usage patterns on Google Cloud platforms.
Analyze the impact of machine learning applications on CPU usage, identifying opportunities for optimization and feature enhancements.
Lead the investigation and development of metrics to measure CPU performance and efficiency, presenting findings to stakeholders and contributing to strategic decisions.
Requirements:
Minimum qualifications:
PhD in Electrical and Electronics Engineering, or equivalent practical experience.
2 years of experience with software development in C++ programming language.
1 years of experience with data structures or algorithms.

Preferred qualifications:
Experience in performance modeling, performance analysis, and workload characterization.
Experience applying machine learning techniques and inference usage models on hardware.
Expertise in CPU architecture disciplines such as branch prediction, prefetching, value prediction, and caching policies.
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2 ימים
Meta
Location: Tel Aviv-Yafo
Job Type: Full Time
Production Engineers at Facebook are hybrid software/systems engineers who ensure that Facebook's services run smoothly and have the capacity for future growth. They are embedded in every one of Facebook's product and infrastructure teams, and are core participants in every significant engineering effort underway in the company.

Our team is comprised of varying levels of experience and backgrounds, from new grads to industry. Relevant industry experience is important, but ultimately less so than your demonstrated abilities and attitude. We sail into uncharted waters every day at Facebook in Production Engineering, and we are always learning.

This position is full-time.
Production Engineer Responsibilities
Own back-end services like our Hadoop data warehouses, front-end services like Messenger and Newsfeed, infrastructure components like our Memcache infrastructure, and everything in between
Write and review code, develop documentation and capacity plans, and debug the hardest problems, live, on some of the largest and most complex systems in the world
Together with your engineering team, you will share an on-call rotation and be an escalation contact for service incidents
Partnered alongside the best engineers in the industry on the coolest stuff around, the code and systems you work on will be in production and used by millions of users all around the world
Requirements:
Minimum Qualifications
Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
Engineering, or a related technical discipline or equivalent experience
7+ years of experience in UNIX and TCP/IP network fundamentals
7+ years of coding experience
Experience learning development languages (PHP, Python, C++, and Java)
Experience learning software, frameworks and APIs
Experience performing 'guerilla capacity planning' for internet service architectures
Knowledge in internet service architectures (such as load balancing, LAMP, CDNs)
Experience in configurating and maintaining of applications such as Apache, Memcached, Squid, MySQL, NFS, DHCP, NTP, SSH, DNS, and SNMP
Preferred Qualifications
BS or MS in Computer Science
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3 ימים
Check Point
Location: Tel Aviv-Yafo
Job Type: Full Time and Hybrid work
We are looking for a talented and experienced JavaScript Developer to join our Web Protection team. As a Software Developer within our team, you will play a critical role in developing cutting-edge products and solutions aimed at protecting our customers from various threats encountered in the web environment. You will have the opportunity to work on challenging projects, collaborate with cross-functional teams, and contribute to the development of industry-leading security solutions.

Key Responsibilities
Lead the Design, develop, and maintenance of high-performance JavaScript applications and components focused on web protection and security.
Collaborate with product managers, designers, and other developers to conceptualize and implement innovative features and solutions.
Conduct thorough code reviews and provide constructive feedback to team members to ensure code quality, performance, and security best practices.
Stay up to date with the latest web security trends, vulnerabilities, and attack vectors to proactively identify and address potential threats.
Participate in architecture and technical design discussions to drive forward-thinking solutions that meet both current and future business needs.
Contribute to the improvement of development processes, tools, and methodologies to enhance team productivity and efficiency.
Join sessions with customers for feedback and troubleshooting, gathering insights to enhance product functionality and address any issues or concerns.
Requirements:
At least 10 years of experience as a Software Developer.
Coding experience in JavaScript and TypeScript.
BSc in Computer Science/Software Engineering or equivalent knowledge.
Strong problem-solving skills and ability to analyze complex technical challenges in a fast-paced environment.
Good communication skills.
Fluent English verbal and written.
Advantages:

Experience in REACT tools including React.js & Webpack.
Experience in Client-side applications in Windows.
Experience in C#.
Experience in server-side development.
Experience in developing Security products.
Experience in WASM.
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4 ימים
Job Type: Full Time and Hybrid work
We are seeking a highly skilled Real-Time C ++ and Python software engineer to join our dynamic team. The ideal candidate will have extensive experience in developing and optimizing software for Real-Time systems, ensuring high performance and reliability. This role involves working on cutting-edge projects that require a deep understanding of the theoretical and practical aspects of Real-Time computing, with proficiency in both C ++ and Python.
Responsibilities:
Design, develop, and maintain software for Real-Time systems using C ++ and Python.
Optimize software to meet performance requirements and ensure low latency and high reliability.
Collaborate with cross-functional teams to define software requirements and specifications.
Implement and TEST software modules to ensure they meet the necessary performance and safety standards.
Requirements:
Bachelors or Masters degree in Computer Science, Engineering, or a related field.
5 years of SW Development experience
At least 3 years of experience in Real-Time software development with C ++ and Python.
Proficiency in multi-threaded and concurrent programming.
Experience with low-level programming and hardware interfacing.
Excellent problem-solving skills and attention to detail.
Ability to work both independently and as part of a team.
Strong communication skills to effectively collaborate with other team members and stakeholders.
Advantages
Experience with Real-Time automotive, aerospace, telecommunications, or industrial automation systems.
Familiarity with software development tools and environments such as GNU/ Linux, Windows, or Embedded systems.
Knowledge of software development methodologies, including Agile and Scrum.
Experience with performance profiling and optimization to
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