דרושים » פיתוח תוכנה » Senior Verification Engineer - Cisco Silicon One

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לפני 9 שעות
Cisco
Location: Caesarea
Job Type: Full Time
Join the Cisco Silicon One Front-End Design Verification team, responsible for validating the most advanced networking silicon in the world. Our team ensures functional correctness, quality, and reliability across the entire design flow. We combine state-of-the-art methodologies with a collaborative, startup-like culture, while being backed by the stability and resources of Cisco.

Your Impact

Develop advanced verification environments using SystemVerilog and UVM
Write, run, and debug testbenches to ensure complete functional coverage
Drive pre-silicon and in-lab debug activities to resolve complex issues
Collaborate with RTL, architecture, and physical design teams to achieve design closure
Support methodology development, scripting, and automation to enhance productivity
Contribute to the success of Cisco Silicon One, powering the next generation of Internet infrastructure
Requirements:
Minimum Qualifications

6+ years of experience in digital logic design verification
Advanced knowledge of SystemVerilog and UVM
Strong debug skills both pre-silicon and in-lab

Preferred Qualifications

Scripting skills (Python, Perl, TCL, or shell)
Experience with system-level integration (AMBA, PCIe, SPI, I2C, JTAG, CPU)
Basic software knowledge (driver-level)
Basic design knowledge and familiarity with CDC concepts
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 9 שעות
Cisco
Location: Caesarea
Job Type: Full Time
Join the Cisco Silicon One Front-End Design Verification team, responsible for validating the most advanced networking silicon in the world. Our team ensures functional correctness, quality, and reliability across the entire design flow. We combine state-of-the-art methodologies with a collaborative, startup-like culture, while being backed by the stability and resources of Cisco.

Your Impact

Develop advanced verification environments using SystemVerilog and UVM
Write, run, and debug testbenches to ensure complete functional coverage
Drive pre-silicon and in-lab debug activities to resolve complex issues
Collaborate with RTL, architecture, and physical design teams to achieve design closure
Support methodology development, scripting, and automation to enhance productivity
Contribute to the success of Cisco Silicon One, powering the next generation of Internet infrastructure
Requirements:
Minimum Qualifications

6+ years of experience in digital logic design verification
Advanced knowledge of SystemVerilog and UVM
Strong debug skills both pre-silicon and in-lab

Preferred Qualifications

Scripting skills (Python, Perl, TCL, or shell)
Experience with system-level integration (AMBA, PCIe, SPI, I2C, JTAG, CPU)
Basic software knowledge (driver-level)
Basic design knowledge and familiarity with CDC concepts
.המשרה מיועדת לנשים ולגברים כאחד
 
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הגשת מועמדות
עדכון קורות החיים לפני שליחה
120439
שירות זה פתוח ללקוחות VIP בלבד
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 9 שעות
Cisco
Location: Caesarea
Job Type: Full Time
Join the Front-End Design team at Cisco Silicon One, responsible for the entire chip design process - from definition and microarchitecture to final production.

Our engineers are hands-on in every stage: definition, design, verification, signoff, and validation, all the way through to silicon bring-up and customer deployment. By applying the latest silicon technologies and methodologies, we develop some of the worlds largest-scale and most sophisticated devices, pushing the boundaries of whats possible.

Your Impact
Contribute to the design and verification of Cisco Silicon One devices across the full development lifecycle.
Write and execute test plans in SystemVerilog and UVM.
Perform advanced debug both pre-silicon and in the lab.
Support system integration, validation, and post-silicon bring-up.
Collaborate closely with cross-functional teams to deliver industry-leading, programmable silicon solutions.
Requirements:
Minimum Qualifications
3+ years of experience in digital logic design verification.
Advanced knowledge of SystemVerilog and UVM.
Strong debugging skills, both pre-silicon and in-lab environments.

Preferred Qualifications
Scripting experience (Python, Perl, or TCL).
Familiarity with system integration (AMBA, PCIe, SPI, I2C, JTAG, CPU).
Basic software knowledge (e.g., driver-level programming).
Basic design knowledge.
.המשרה מיועדת לנשים ולגברים כאחד
 
Show more...
הגשת מועמדות
עדכון קורות החיים לפני שליחה
120442
שירות זה פתוח ללקוחות VIP בלבד