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3 ימים
Google Israel
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Help to maintain and upgrade emulation infrastructure and act as a primary interface to emulation vendors.
Explore emulation methodologies, gather feedback from the team, and implement emulation workflows and methodologies.
Create tooling and automation to support emulation Electronic Design Automation (EDA) tools, licensing, and job management in Google infrastructure.
Support emulation team members in debugging hardware, tooling, and project specific issues.
Help bring up external interfaces (e.g., USB, Peripheral Component Interconnect Express (PCIe), Ethernet, etc.) on the emulation platforms, and create test cases for tool issues encountered in the emulation compile and runtime flows.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
3 years of experience with emulation systems including maintenance, upgrades, methodology enhancements and Electronic Design Automation (EDA) tools (e.g., Palladium or Zebu).
Experience with coding in Perl, TCL or Python.

Preferred qualifications:
Master's degree in Electrical Engineering.
Experience in deploying EDA tools into distributed environments.
Experience with system administration, networking, and security systems.
Experience with Register-Transfer Level (RTL) design, Verilog, simulation (e.g., VCS, Incisive, Questa), System Verilog (e.g., DPI and transactors), and assertions.
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113547
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Google Israel
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Develop and optimize the overall layout of the chip, including partitioning, macro and IP placement, and pin placement.
Design and implement efficient power delivery networks (power grids) to ensure stable power to all parts of the chip.
Develop and validate high-performance, low-power clock networks (Clock Tree Synthesis - CTS) to ensure proper synchronization across the entire chip.
Develop, enhance, and maintain custom scripts (e.g., Tcl, Perl, Python) for automation and improved efficiency.
Conduct extensive design rule checks (DRC) to ensure the layout adheres to manufacturing rules, Perform layout versus schematic (LVS) checks to verify that the physical layout matches the logical design.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
4 years of experience with physical design flows and methodologies (RTL2GDS).
Experience in semiconductor process technologies (deep submicron, advanced nodes like 5nm and below), and device physics (MOSFET/FINFET).
Experience with design for testability (DFT) and low-power design methodologies.
Experience with UPF (Unified Power Format) and its application in physical design.

Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience with scripting languages such as Perl, Python, or Tcl.
Ability to use analysis skills to understand, debug, and resolve issues in the design flow.
.המשרה מיועדת לנשים ולגברים כאחד
 
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113548
שירות זה פתוח ללקוחות VIP בלבד
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Google Israel
Location: Tel Aviv-Yafo
Job Type: Full Time
Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Googles needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.

In this role, you will work with system teams and the CPU Architecture team to develop an understanding of the CPU, System on a Chip (SoC), performance metrics, benchmarks/measuring tools, and available optimization knobs. You will define methods and technologies to model CPU performance at different accuracy levels by supporting architectural explorations and decision-making. You will correlate performance projections with measured post-silicon data.The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Write product or system development code.
Design, develop, test, deploy, maintain, and improve Central Processing Unit (CPU) software modeling and other software tools.
Manage project priorities, deadlines, and deliverables.
Collaborate with hardware and software CPU architecture teams, SOC performance modeling team, and other Google Software teams.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
2 years of experience with software development in C++ programming language, or 1 year of experience with an advanced degree.
2 years of experience with data structures or algorithms.

Preferred qualifications:
Masters degree or PhD in Engineering, Computer Science, or a related technical field.
Experience in modern CPU/ML architecture and micro-architecture.
Ability to learn coding languages as needed.
Excellent object-oriented, database design, and SQL skills.
.המשרה מיועדת לנשים ולגברים כאחד
 
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הגשת מועמדות
עדכון קורות החיים לפני שליחה
113511
שירות זה פתוח ללקוחות VIP בלבד
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Google Israel
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Design Verification Engineer, you will work as part of a Research and Development team building verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify digital designs. You will collaborate with design and verification engineers in active projects and perform verification. You will be responsible for the full life-cycle of verification which can range from verification planning, test execution or collecting and closing coverage.

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Apply close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
1 year of experience creating and using verification components and environments in standard verification methodology.
Experience verifying digital logic at Register Transfer Level (RTL) level using SystemVerilog or Specman/E for Field Programmable Gate Arrays or ASICs.

Preferred qualifications:
Masters degree in Electrical Engineering, Computer Science, or a related field.
Experience with Universal Verification Methodology (UVM), SystemVerilog, or other scripting languages (e.g., Python, Perl, Shell, Bash, etc.).
Experience with CPU implementation, assembly language or compute SOCs.
.המשרה מיועדת לנשים ולגברים כאחד
 
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הגשת מועמדות
עדכון קורות החיים לפני שליחה
113539
שירות זה פתוח ללקוחות VIP בלבד
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Google Israel
Location: Tel Aviv-Yafo
Job Type: Full Time
Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Googles needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.

The Core team builds the technical foundation behind Googles flagship products. We are owners and advocates for the underlying design elements, developer platforms, product components, and infrastructure at Google. These are the essential building blocks for excellent, safe, and coherent experiences for our users and drive the pace of innovation for every developer. We look across Googles products to build central solutions, break down technical barriers and strengthen existing systems. As the Core team, we have a mandate and a unique opportunity to impact important technical decisions across the company.

Responsibilities
Write product or system development code.
Create user-facing channels and cross-product experiences which drive ecosystem adoption, and add value to users, across iOS, Android and desktop.
Build the native iOS offering, including experiences on iOS devices focused on increasing engagement with Google products and features and incorporating the latest trends in iOS development and capabilities into Googles apps.
Grow existing products, improve data analytics pipelines and analytics, enhance Machine Learning (ML) capabilities, develop better experimentation capabilities, implement alerting, and improve campaign management.
Improve and scale products by enhancing User Experience (UX), optimizing latency and product quality, and driving experimentation for content improvement.
Requirements:
Minimum qualifications:
Bachelors degree or equivalent practical experience.
1 year of experience with software development in one or more programming languages (e.g., Python, C, C++, Java, JavaScript).
1 year of experience with data structures or algorithms.
1 year of experience with iOS application development.


Preferred qualifications:
Experience in partnership with cross-functional peers (e.g., User Experience, Product Manager, Analysts), and external collaborators.
Experience building mobile UIs, both within an app and with widgets.
Experience with Swift/Swift UI.
Knowledge of dependency injection concepts and frameworks.
.המשרה מיועדת לנשים ולגברים כאחד
 
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עדכון קורות החיים לפני שליחה
113538
שירות זה פתוח ללקוחות VIP בלבד
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Google Israel
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities
Plan the formal verification strategy and create the properties and constraints for digital design blocks.
Utilize formal property verification tools combined with formal verification closure techniques to verify properties.
Contribute improvements to methodologies to enhance formal verification results.
Architect and implement reusable formal verification components.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
4 years of experience working in main interconnects, Direct Memory Access (DMA), controllers, and power management.
Experience capturing design specification in a temporal assertion language (e.g., System Verilog Assertions (SVA) or Property Specification Language (PSL)).

Preferred qualifications:
Master's degree or PhD in Electrical Engineering or Computer Science, or a related field.
Experience working with one or more formal verification tools (e.g., JasperGold, VC Formal, Questa Formal, or Display and Video 360).
.המשרה מיועדת לנשים ולגברים כאחד
 
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הגשת מועמדות
עדכון קורות החיים לפני שליחה
113514
שירות זה פתוח ללקוחות VIP בלבד
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Google Israel
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will help to develop and maintain emulation infrastructure, tools, and workflow methodologies supporting our Application-specific integrated circuit (ASIC) projects. You will provide emulation infrastructure and methodologies for supporting these projects. You will work with other emulation team members as well as designers, verification engineers, and software teams. You will work with with our external vendors, lab support teams, networking and security, and Electronic Design Automation (EDA) tooling and methodology teams to deliver emulation based prototyping capabilities for our ASIC projects. You will also assist in compiling projects specifying our prototyping platforms, debugging issues in both infrastructure and design, assisting in the hardware and lab bring up, and verification of our ASIC systems.

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities
Help in maintaining and upgrading emulation infrastructure and act as a primary interface to emulation vendors.
Explore emulation methodologies, gather feedback from the team, and implement emulation workflows and methodologies.
Create tooling and automation to support emulation Electronic Design Automation (EDA) tools, licensing, and job management in Google infrastructure.
Support emulation team members with debugging hardware, tooling, and project specific issues.
Help to bring up external interfaces (e.g., USB, PCIe, Ethernet, etc.) on the emulation platforms, and create standalone test cases for tool issues encountered in the emulation compile and runtime flows.
Requirements:
Minimum qualifications:
Bachelor's degree in Computer Science, Electrical Engineering, or equivalent practical experience.
Experience with associated Electronic Design Automation (EDA) tools, with automation and flow enhancements.
Experience using command debug tools (e.g., Verdi, SimVision/Indago, GDB) and programming in C, C++, Perl, TCL, or Python.
Experience with emulation systems, maintenance, upgrades, and methodology enhancements.

Preferred qualifications:
Master's degree in Computer Science, Electrical Engineering, or a related technical field.
Experience deploying Electronic Design Automation (EDA) tools into distributed environments.
Experience with system administration, networking, and security systems.
Experience with Register-Transfer Level (RTL) design, Verilog, simulation, System Verilog, and assertions.
.המשרה מיועדת לנשים ולגברים כאחד
 
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113537
שירות זה פתוח ללקוחות VIP בלבד
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Google Israel
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

As an SoC Design Verification Engineer, you will work as part of a Research and Development team, and your responsibilities will include building verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will use your design and verification expertise to verify complex digital designs. You will collaborate closely with design and verification engineers in active projects and perform verification. Using your UVM and SystemVerilog coding and problem-solving skills, you'll build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will be responsible for the full lifecycle of verification which can range from verification planning, test execution or collecting and closing coverage.

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities
Verify designs using verification techniques and methodologies.
Work cross-functionally to debug failures and verify the functional correctness of the design.
Provide test plans, including verification strategy, environment, components, stimulus, checks, and coverage, and ensure documentation is easy to use.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
1 year of experience with using verification components and environments in standard verification methodology.

Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture, or a related field.
Experience creating and using verification components and environments in standard verification methodology.
Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems)
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or ASICs.
.המשרה מיועדת לנשים ולגברים כאחד
 
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הגשת מועמדות
עדכון קורות החיים לפני שליחה
113536
שירות זה פתוח ללקוחות VIP בלבד
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Google Israel
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

As a Senior CPU Design Verification Engineer, you will work as part of a Research and Development team, and you will build verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify digital designs. You will collaborate with design and verification engineers in projects and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification which can range from verification planning, test execution or collecting, and closing coverage.The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Plan the verification of digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog/Universal Verification Methodology (UVM), or Specman.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Lead coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience verifying digital logic at RTL level using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or ASICs.
Experience verifying digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems).
Experience creating and using verification components and environments in standard verification methodology.
Experience with CPU implementation, assembly language, or compute System on a Chip (SOC).

Preferred qualifications:
Masters degree in Electrical Engineering or Computer Science.
Experience with UVM, SystemVerilog, or other scripting languages (e.g., Python, Perl, Shell, Bash, etc.).
.המשרה מיועדת לנשים ולגברים כאחד
 
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הגשת מועמדות
עדכון קורות החיים לפני שליחה
113513
שירות זה פתוח ללקוחות VIP בלבד
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Google Israel
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and verification closure. You will verify digital designs and collaborate with design and verification engineers in projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification which can range from verification planning, test execution or collecting, and closing coverage.

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities
Plan the verification of digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with Strategic Value Add (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
4 years of experience working with design networking like Remote Direct Memory Access (RDMA) or packet processing and system design principles for low latency, throughput, security, and reliability.
Experience in creating and using verification components and environments in standard verification methodology.

Preferred qualifications:
Experience in verifying digital systems using standard Internet Protocol (IP) components or interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
Experience in Transmission Control Protocol (TCP), IP, Ethernet, PCIE and Dynamic random-access memory (DRAM), Network on Chip (NoC) principles and protocols.
Experience in estimating performance by analysis, modeling, and network simulation in defining and driving performance test plans.
Experience with verification techniques, and the full verification life-cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with ASIC standard interfaces and memory system architecture.
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113515
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3 ימים
Google Israel
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Senior SoC Design Verification Engineer, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.

As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems).
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.

Preferred qualifications:
Master's or PhD degree in Electrical Engineering.
Experience with verification techniques, and the full verification life cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with ASIC standard interfaces and memory system architecture.
Experience in 4 or more SOC cycles.
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הגשת מועמדות
עדכון קורות החיים לפני שליחה
113512
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
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שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Google Israel
Location: Tel Aviv-Yafo
Job Type: Full Time
Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Googles needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.

With your technical expertise you will manage project priorities, deadlines, and deliverables. You will design, develop, test, deploy, maintain, and enhance software solutions.

Google Cloud accelerates every organizations ability to digitally transform its business and industry. We deliver enterprise-grade solutions that leverage Googles cutting-edge technology, and tools that help developers build more sustainably. Customers in more than 200 countries and territories turn to Google Cloud as their trusted partner to enable growth and solve their most critical business problems.

Responsibilities
Write product or system development code.
Participate in, or lead design reviews with peers and stakeholders to decide amongst available technologies.
Review code developed by other developers and provide feedback to ensure best practices (e.g., style guidelines, checking code in, accuracy, testability, and efficiency).
Contribute to existing documentation or educational content and adapt content based on product/program updates and user feedback.
Triage product or system issues and debug/track/resolve by analyzing the sources of issues and the impact on hardware, network, or service operations and quality.
Requirements:
Minimum qualifications:
Bachelors degree or equivalent practical experience.
2 years of experience with software development in one or more programming languages, or 1 year of experience with an advanced degree.

Preferred qualifications:
Master's degree or PhD in Computer Science or related technical fields.
2 years of experience with data structures or algorithms.
Experience developing accessible technologies.
Experience delivering enterprise-grade quality product, preferably within the infrastructure (DB/Storage/Networking/Security) domain.
Experience with SQL Server administration and tuning.
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הגשת מועמדות
עדכון קורות החיים לפני שליחה
113508
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Google Israel
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time and Entry Level Academic Jobs
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a CPU Design Verification Engineer, you will work as part of a Research and Development team building verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify complex digital designs. You will collaborate with design and verification engineers in active projects and perform verification. You will be responsible for the full lifecycle of verification which can range from verification planning, test execution, or collecting and closing coverage.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Apply close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
Experience creating and using verification components and environments in standard verification methodology.
Experience verifying digital logic at Register Transfer Level (RTL) level using SystemVerilog or Specman/E for Field Programmable Gate Arrays or ASICs.

Preferred qualifications:
Masters degree in Electrical Engineering or Computer Science.
Experience with Universal Verification Methodology (UVM), SystemVerilog, or other scripting languages (e.g., Python, Perl, Shell, Bash, etc.).
Experience with CPU implementation, assembly language, or compute SOCs.
.המשרה מיועדת לנשים ולגברים כאחד
 
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הגשת מועמדות
עדכון קורות החיים לפני שליחה
113504
שירות זה פתוח ללקוחות VIP בלבד
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Google Israel
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Junior SoC Design Verification Engineer, you will develop and execute efficient verification strategies ranging from planning and constrained random testing to debugging and closure while collaborating with engineers to validate digital designs across the life-cycle.Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Plan verification of digital design blocks by understanding specifications and collaborating with design engineers to identify key scenarios.
Develop and refine constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM) or formally verify designs using SVA and formal tools.
Identify and define all relevant coverage measures to address design corner-cases.
Debug tests with design engineers to ensure functionally correct design blocks.
Close coverage gaps to identify verification holes and demonstrate progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
1 year of experience with using verification components and environments in standard verification methodology.
Experience verifying digital systems using standard Internet Protocol (IP) components/interconnects such as microprocessor cores, hierarchical memory subsystems.
Experience verifying digital logic at Register-Transfer Level (RTL) level using SystemVerilog or Specman/E for Field Programmable Gate Array (FPGAs) or ASICs.

Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience with verification techniques and verification life-cycle.
Experience with Application-specific integrated circuit (ASIC) standard interfaces and memory system architecture.
Experience with performance verification of ASICs and ASIC components.
.המשרה מיועדת לנשים ולגברים כאחד
 
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הגשת מועמדות
עדכון קורות החיים לפני שליחה
113509
שירות זה פתוח ללקוחות VIP בלבד
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Google Israel
Location: Tel Aviv-Yafo
Job Type: Full Time
Like Google's own ambitions, the work of a Software Engineer goes beyond just Search. Software Engineering Managers have not only the technical expertise to take on and provide technical leadership to major projects, but also manage a team of Engineers. You not only optimize your own code but make sure Engineers are able to optimize theirs. As a Software Engineering Manager you manage your project goals, contribute to product strategy and help develop your team. Teams work all across the company, in areas such as information retrieval, artificial intelligence, natural language processing, distributed computing, large-scale system design, networking, security, data compression, user interface design; the list goes on and is growing every day. Operating with scale and speed, our exceptional software engineers are just getting started -- and as a manager, you guide the way.

With technical and leadership expertise, you manage engineers across multiple teams and locations, a large product budget and oversee the deployment of large-scale projects across multiple sites internationally.

Andromeda is a scalable and flexible software-defined network (SDN) stack that provides network virtualization and advanced networking features, such as routing, firewall and load balancing, for Google Compute Engine (GCE).

USPS/Andromeda is the software that runs on every physical host in the Google Cloud fleet and provides networking capabilities to Google Cloud customers. It is a core component of Google's software-defined network (SDN), Andromeda. It is based on the C++ programming language running in User Space.

The Tel Aviv (TLV) teams are working on core Andromeda products and components, including Firewall, Cloud NAT, and Hoverboard.

Google Cloud accelerates every organizations ability to digitally transform its business and industry. We deliver enterprise-grade solutions that leverage Googles cutting-edge technology, and tools that help developers build more sustainably. Customers in more than 200 countries and territories turn to Google Cloud as their trusted partner to enable growth and solve their most critical business problems.
Responsibilities
Set and communicate team priorities that support the broader organization's goals. Align strategy, processes, and decision-making across teams.
Set clear expectations with individuals based on their level and role and aligned to the broader organization's goals. Meet regularly with individuals to discuss performance and development and provide feedback and coaching.
Develop the mid-term technical goal and roadmap within the scope of your often multiple teams. Evolve the roadmap to meet anticipated future requirements and infrastructure needs.
Design, guide and vet systems designs within the scope of the broader area, and write product or system development code to solve ambiguous problems.
Review code developed by other engineers and provide feedback to ensure best practices (e.g., style guidelines, checking code in, accuracy, testability, and efficiency).
Requirements:
Minimum qualifications:
Bachelor's degree or equivalent practical experience.
8 years of experience with software development in one or more programming languages (e.g., Python, C, C++, Java, JavaScript).
3 years of experience in a technical leadership role; overseeing projects, with 2 years of experience in a people management, supervision/team leadership role.
3 years of experience building and developing large-scale infrastructure or distributed systems.

Preferred qualifications:
Masters degree or PhD in Engineering, Computer Science, or a related technical field.
3 years of experience working in a complex, matrixed organization.
Experience managing people managers.
Experience coding in C or C++.
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