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Check Point Research (CPR) is looking for a Threat Researcher to join its Threat Intelligence Analysis (TIA) team. The team is responsible of discovering, analyzing and tracking advanced threat actors and campaigns, with a strong focus on high-end cybercrime and state-sponsored activities. You will join a team of motivated, independent & highly technical individuals and contribute the effort to protect Check Point customers and empower the Check Point brand.

Key Responsibilities
Identify, understand and monitor advanced campaigns using publicly available sources as well as internal telemetry.
Analyze malware and other hacking tools utilized by threat actors in active campaigns and intrusions.
Create technical research content for public and private intelligence reports.
Help build protections and detections based on deep understanding of advanced threat actors Tactics Techniques and Procedures (TTPs).
Collaborate with other security teams to assist threat intelligence and research tasks.

You'll be joining Cisco Silicon One Israeli team which is the core center of Ciscos SW and ASIC design. You'll be part of the group driving our groundbreaking next-generation network devices - Cisco Silicon One. Our unique team works in a startup atmosphere inside a stable and leading corporate and develops the full software stack enabling the Silicon One ASICs.

Join a team of dedicated engineers with a proven track-record at delivering breakthrough products. Our R&D center is outstanding - hosting all silicon HW and SW development teams inside one site. We are transforming the industry and building a new AI/ML Networks, as well as providing a unified, programmable silicon architecture that is the foundation of all Cisco's future routing products. Our devices are crafted to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms. Our devices deliver high speed (50+ Terabits per second) without sacrificing programmability, buffering, power efficiency, scale or feature flexibility.

Cisco Silicon One is a revolutionary, ground-breaking technology for our customers and end users for decades to come! The Internet now has a new faster, better, safer engine!

You have a unique opportunity to join the core center of Cisco silicon SW development and work with us to design and deliver breakthrough technologies.



Your Impact

You'll develop Core Software technologies at the heart of tomorrow's leading infrastructure solutions, tackling the entire range of challenges from user-facing API-s, through high-level algorithms, all the way down to firmware.

In this role, you will:

Craft and develop software driving the world's most complex infrastructures
Gain intimate knowledge of world-class silicon and programming models
Work with architecture and design teams to define the next generation of ASIC products being developed

Join the Cisco Silicon One team and be part of the cutting-edge innovation that drives our next-generation network devicesCisco Silicon One. Our unique team operates in a startup-like atmosphere within a stable and leading corporation, working on some of the most advanced silicon technologies. Our design center is home to all silicon hardware and software development disciplines, creating an environment that fosters collaboration and technical excellence.

We are redefining the industry and building the next-generation internet for the 5G era, providing a unified, programmable silicon architecture that is the foundation for all of Cisco's future routing products. Cisco Silicon One delivers high-speed networking while ensuring programmability, power efficiency, and scalability across a range of service provider and web-scale markets.

Your Impact
As a Design for Test (DFT) Engineer, you will:

Develop and implement DFT features to ensure high-quality, testable, and manufacturable designs.
Contribute to the full product cycle, from pre-silicon design to post-silicon debug and production qualification.
Work closely with chip architects, design engineers, and verification teams to define and optimize DFT strategies.
Implement ATPG, scan compression, and memory BIST techniques to improve test coverage and efficiency.
Lead debugging and root-cause analysis of silicon failures to improve yield and reliability.
Establish DFT methodologies and best practices to enhance the efficiency of future designs.