דרושים » הנדסה » Verification engineer

We are seeking a highly skilled Verification engineer and Logic Designer to join our dynamic team.

Key Responsibilities:
Develop and implement comprehensive verification plans for logic designs
Design and maintain testbenches for logic projects
Conduct functional simulations and analyze results to ensure design integrity
Debug and resolve issues identified during verification
Collaborate closely with design engineers to understand design intent and constraints
Design and develop logic-based solutions using VHDL/Verilog