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In this role, you will leverage your expertise in distributed systems, data engineering, and software development to design, build, and deploy high-performance solutions. You will take a leading role in developing and maintaining a cutting-edge online machine learning system powered by PyTorch/Tensorflow models and Triton inference server.

This is an opportunity to work on complex, large-scale systems that serve billions of requests, shaping the future of ad tech and ML-driven optimization.

What you'll be doing
Architect and Build: Design, develop, and deploy robust, scalable, and high-performance distributed systems that form the backbone of ironSource's next-generation ML ad network.
Real-Time Ad Serving: Engineer and optimize critical systems for real-time ad serving, enabling machine learning models to make intelligent, low-latency decisions for optimal ad selection.
ML Infrastructure Innovation: Drive the evolution of our ML capabilities by researching, evaluating, and implementing cutting-edge techniques for feature stores, data aggregation, and model serving infrastructure.
Data Pipeline Engineering: Collaborate closely with data scientists and product managers to design, build, and maintain efficient and reliable data lakes and data pipelines, ensuring high-quality data for ML training and analytics.
Operational Excellence: Take ownership of key system components, ensuring their reliability, performance, and scalability in a production environment through proactive monitoring and continuous improvement.

We're the driving team behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Apply close coverage measures to identify verification holes and to show progress towards tape-out.