The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry.
What you will do
In this role, you will be responsible for Cisco SiliconOne Switch ASIC Post-Silicon Electrical Validation. You will deal with all chip validation aspects: Building validation plan, Coding the validation SW environment using Python and device SDK, test execution and results analysis. You will gain detailed knowledge of chip architecture, functionality and operation modes allowing you to debug and tackle Electrical chip related problems. Travel abroad for 2-4 weeks a year.
Who you will work with
You'll join our Cisco SiliconOne group, the center of Ciscos ASIC design. We are redefining the industry and building a new internet for the 5G era, providing a unified, programmable silicon architecture that is the foundation of all Cisco's future routing products. As part of ASIC Hardware Engineering team located at San-Jose USA and at Caesarea Israel you will be cooperating with various groups across the globe such as: Board-Design, Software, Signal and Power Integrity, Packaging and Production.
Requirements: Minimum Qualifications
* Bachelor's or a Masters Degree in Electrical or Computer Engineering required with at least 8 years of experience in Hardware and Post-Silicon Validation
* Prior experience leading a small engineering team
* Prior experience working with lab experience performing High-Speed, Clocks and precise voltage measurements
* Prior experience with Python scripting and working with complex SD
Preferred Qualifications
* Prior experience bringing up the ASIC on EVB with Board-Design, FPGA, SerDes and SW teams
* Prior experience debugging issues in the lab using VNA/TDR, Oscilloscopes and Phase Noise analyze
* Prior experience developing testing environment, perform validation activities and analyze received data
* Prior experience working with production testing teams to identify recurring issues and work on yield improvement
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