לוח משרות דרושים פיתוח תוכנה בחיפה וסביבתה

You'll join the frontend design team at Cisco Silicon One, which is responsible for all chip design processes from definition/microarchitecture to product.
Our design engineers deal with all chip design aspects: Definition, Design, Verification, signoff, and validation up to production.
We use the latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.

Who You'll Work With

You'll join our Cisco Silicon One group, the center of Ciscos ASIC design.

You'll be part of our Group driving our game-changing next-generation network devices - Cisco Silicon One. Our unique team works in a startup atmosphere inside a stable and leading corporate

Our unique design center hosts all silicon HW and SW development disciplines inside one site.

We are transforming the industry and building a new internet for the 5G era, providing a unified, programmable silicon architecture that is the foundation of all Cisco's future routing products.

Our devices are designed to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms. Our devices deliver high speed without sacrificing programmability, buffering, power efficiency, scale or feature flexibility.

You'll be joining our Cisco Silicon One architecture team, which is at the center of the silicon development at Cisco.
Our architects deal with all system chip development aspects and deliver specifications to other development teams.

Our architects define the features of tomorrows devices.

Our data-driven approach allows us to provide optimal solutions for our customers by modeling and studying the networks of tomorrow.

As an architect, youll be required to have strong networking research skills and a strong theoretical background.

Youll be required to model, analyze, and present simulation results of cutting-edge networking solutions for variety of use cases.


Who You'll Work With

You'll be joining Ciscos Silicon One architecture team, which is at the center of Ciscos ASIC group.
You'll be part of our group driving our game-changing next-generation networking devices - Cisco Silicon One.

Our unique and small team works in a startup atmosphere inside a stable and leading corporation.

Our design center is unique - hosting all silicon HW and SW development disciplines inside one site.

We are transforming the industry and building a new internet for AI networks, and the 5G era, providing a unified,

programmable silicon architecture that is the foundation of all of Cisco's future routing and switching products.

Our devices are designed to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms.

Our devices deliver high speed without sacrificing programmability, buffering, power efficiency, scale, or feature flexibility.

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

As a CPU Design Verification Engineer, you will work as part of a Research and Development team, and you will build verification components, constrained-random testing, system testing, and verification closure.

As part of our server chip design team, you will verify complex digital designs. You will collaborate closely with design and verification engineers in projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the life-cycle of verification which can range from verification planning, test execution or collecting, and closing coverage.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities
Plan the verification of digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog/UVM, or Specman.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and show progress towards tape-out.

As a Systems Development Engineer at Google, you'll own and support the needs of Google's internal systems and related infrastructure. You're highly technical and will work directly with other systems and service owners to ensure reliability and sustainability of the Google service infrastructure as well as compliance with internal policies. Success in this role means you'll be able to support systems in a mixed operating system environment and will work efficiently with our internal technology providers as well as other operations groups. Googlers will rely on your guidance when it comes to design decisions so you'll have a direct impact in keeping the business productive.

Google Cloud accelerates organizations ability to digitally transform their business with the best infrastructure, platform, industry solutions and expertise. We deliver enterprise-grade solutions that leverage Googles cutting-edge technology all on the cleanest cloud in the industry. Customers in more than 200 countries and territories turn to Google Cloud as their trusted partner to enable growth and solve their most critical business problems.

Responsibilities
Develop and support a broad set of Electronic Design Automation (EDA) Cloud's technical stack and identify areas for improvement.
Provide technical leadership and contribution to EDA Cloud systems and workflows.
Develop and drive automated solutions.
Work collaboratively and implement solutions with partner teams.
Identify and explore new tools and technologies to improve the EDA Cloud environment.

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

In this role, you will take part in CPU development, leading the CPU architecture and microarchitecture definitions. You will collaborate with software and hardware architects, design, verification, and physical implementation teams. You will influence the building of processor performance analysis infrastructure with modeling, emulation, and silicon measurement and drive power and performance optimizations for our specific customers workloads.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities
Lead architectural definition of CPU core designs, facilitate and make final decisions.
Participate in and influence the building of processor performance analysis infrastructure.
Influence the development of architectural models with varying configurations across product categories.
Perform Performance, Power, Area (PPA) trade-off analysis for architecture and microarchitecture features, communicate analysis results in both qualitative and quantitative fashion to support decisions.

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

As a Silicon Validation High speed Interfaces Lead, you will lead and drive complex technical projects from the concept/planning stage through execution and closure. As part of our server chip design team, you will validate complex designs, collaborate closely with design, architecture, firmware and verification teams in active projects, and perform validation and characterizations of multiple high-speed interfaces. You will be responsible for the full life-cycle of the validation which can range from planning through execution, characterization and debug.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities
Enable and validate ownership (e.g., functional, electrical, compliance testing, performance) of multiple high-speed interfaces blocks.
Understand the design and Interact with architecture, design and verification teams to build a complete validation and characterization plan.
Lead a team of validation engineers. Plan tasks, allocate the required resources and track the overall execution.
Deliver tools to internal/external customers, for system level testing purposes.
Support system debug and integration of new Dual in-Line Memory Module (DIMM) vendors and knowledge of ARM based SoC architecture (e.g., Boot flow, High-speed I/F initialization).

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

As a CPU Design Verification Engineer, you will work as part of a Research and Development team, and you will build verification components, constrained-random testing, system testing, and verification closure.

As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers in projects and perform direct verification. You'll build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full lifecycle of verification which can range from verification planning, test execution or collecting, and closing coverage.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog/UVM, or Specman.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Lead coverage measures to identify verification holes and to show progress towards tape-out.