Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work with internal system teams and the System-on-Chip (SoC) Architecture team to develop an understanding of the SoC, performance metrics, benchmarks/measuring tools, and available optimization knobs. You will define methods and technologies to model SoC performance at different accuracy levels by supporting architectural explorations and decision-making. In addition, you will correlate performance projections with measured post-silicon data.
The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Develop simulators and architectural models of general-compute SoCs.
Collaborate with system architects, SoC and IP architects/designers, and software and application experts to understand current and future requirements.
Participate in architectural and design evaluation of SoC designs.
Perform pre-silicon performance simulation and correlate with post-silicon measurements.
Communicate analysis results qualitatively and quantitatively.
Requirements: Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
8 years of experience with C++ and Python.
Experience with analysis of multi-core SoC workload performance.
Experience creating or integrating simulation models of multi-core SoC subsystems at different levels of abstraction (e.g., cycle-accurate and TLM).
Preferred qualifications:
Experience with systemC.
Experience with SoC cycles in SoC performance modeling and analysis.
Knowledge of caches, mesh fabric, coherency, memory controllers, DRAM, PCIe, CPU, or GPU.
Ability to read, debug, and modify RTL and work with design flow, tools, and verilog language.
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