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חברת השמה / כח אדם

4 ימים
NOW
Location: Tel Aviv-Yafo
Job Type: Full Time and Hybrid work
We are looking for outstanding candidates to fill a backend team lead position. Our ideal candidate is a talented software engineer with excellent technical and interpersonal skills to join our development team.
As a key member of the team, you will play a major role in leading our next-generation Gen-Ai-based product development. This is an excellent opportunity to join a well-established company operating in a delivery startup mode on its journey to our next-generation product suite.
Requirements:
Required Skills
7+ years?of Hands-on experience in backend development, with participation in data -centric products.
Previous experience as a Tech Lead/ team leader.
Exceptional design and coding skills in.
Deep knowledge of SQL and NoSQL databases - a must.
Experience working in development environments for WEB and Mobile systems.
Proven ability to write rock-solid, mission-critical software.
Excellent communication skills with the capacity to interact effectively with stakeholders at various levels.
B.Sc. in Computer Science /SW Engineering or equivalent.
Advantages:
Gen-AI background.
Hands-on experience with AWS.
Experience in advanced versions of Angular for Front-End development.
Experience in development using.NET Core.
Experience with development using Ionic technology.
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92336
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
5 ימים
Google Israel
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

As a SoC Design Verification Engineer, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.

As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
4 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems).
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.

Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience with verification techniques, and the full verification life-cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with ASIC standard interfaces and memory system architecture.
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118447
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
5 ימים
Google Israel
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will use your ASIC design experience to be part of a team that develops the ASIC SoC from Plan of Record (POR) to Production. Creating SoC Level micro architecture definitions, RTL coding and all RTL quality checks. You will also have the opportunity to contribute to design flow and methodologies. You will collaborate with members of architecture, software, verification, power, timing, synthesis dft etc. You will face technical tests and develop/define design options for performance, power and area.

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities
Define the SoC/block level design document such as interface protocol, block diagram, transaction flow, pipeline etc.
Perform Register-Transfer Level (RTL) development (e.g., coding and debug in Verilog, System Verilog), function/performance simulation debug and Lint/Cyber Defense Center/Formal Verification/Unified Power Format checks.
Participate in synthesis, timing/power closure, and Application-Specific Integrated Circuit (ASIC) silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Participate in architecture feedback.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
Experience in logic design.
Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques.
Experience with design sign off and quality tools (e.g., Lint, CDC, etc.).
Experience with SOC architecture.

Preferred qualifications:
Master's degree or PhD in Computer Science or a related technical field.
Knowledge of assertion-based formal verification.
Knowledge in one of these areas: Peripheral Component Interconnect Express (PCIe), Universal Chiplet Interconnect Express (UCIe), Double Data Rate (DDR), Advanced eXtensible Interface (AXI), or Advanced RISC Machines (ARM) processors family.
Knowledge of high performance and low power design techniques.
Excellent problem-solving and debugging skills.
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118421
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
5 ימים
Google Israel
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities
Plan the formal verification strategy and create the properties and constraints for digital design blocks.
Utilize formal property verification tools combined with formal verification closure techniques to verify properties.
Resolve difficult to verify properties, and contribute improvements to methodologies to enhance formal verification results.
Architect and implement reusable formal verification components.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
8 years of experience working in main interconnects, Direct Memory Access (DMA), controllers, and power management.
Experience capturing design specification in a temporal assertion language (e.g., SVA or PSL).

Preferred qualifications:
Master's degree or PhD in Electrical Engineering or Computer Science, or a related technical field.
Experience with scripting languages (e.g., Python).
Experience working with one or more formal verification tools, such as JasperGold, VC Formal, Questa Formal, or 360-DV.
Knowledge of formal verification algorithms.
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עדכון קורות החיים לפני שליחה
118401
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
5 ימים
Google Israel
Location: Tel Aviv-Yafo
Job Type: Full Time
Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Googles needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.

The Waze Personalization and Guidance team works on fascinating issues at the intersection of user experience and large-scale systems. We own the platform responsible for delivering real-time visual and audio guidance for navigation. We also supply personalization insights to create a more tailored experience for our users.

As a Senior Software Engineer, you will influence the architecture of our core guidance and personalization systems, lead impactful projects, and contribute to a product that makes a real difference in people's lives. This is an ideal role for a proactive engineer who is eager to take on significant ownership and responsibility.

Waze is where people and technology meet to solve transportation challenges. It's a platform that empowers users to contribute road data and edit Waze maps to improve the way we move about the world. As the social navigation pioneer, Waze leverages mobile technology and a passionate global community to redefine expectations of todays maps.
Responsibilities
Own the design and development of critical features for the Waze Personalization and Guidance platform, addressing ambiguous problems and delivering scalable, high-quality solutions that impact millions of users.
Drive the technical direction for multi-quarter projects, making key architectural decisions and ensuring the long-term health and maintainability of our systems.
Elevate the team's engineering standards by mentoring other engineers, leading code and design reviews, and proactively improving our systems and processes.
Collaborate with product managers, user experience (UX) designers, and other engineering teams to shape the product roadmap and deliver impactful user-facing features.
Requirements:
Minimum qualifications:
Bachelors degree or equivalent practical experience.
5 years of experience with software development in Java.
3 years of experience testing, maintaining, or launching software products, and 1 year of experience with software design and architecture.

Preferred qualifications:
Master's degree or PhD in Computer Science or a related technical field.
5 years of experience with data structures/algorithms.
Experience with large-scale distributed systems and cloud platforms like Google Cloud Platform.
Proficiency in investigative thinking and system design.
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118418
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
5 ימים
Google Israel
Location: Tel Aviv-Yafo
Job Type: Full Time
Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Googles needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward. The Core team builds the technical foundation behind Googles flagship products. We are owners and advocates for the underlying design elements, developer platforms, product components, and infrastructure at Google. These are the essential building blocks for excellent, safe, and coherent experiences for our users and drive the pace of innovation for every developer. We look across Googles products to build central solutions, break down technical barriers and strengthen existing systems. As the Core team, we have a mandate and a unique opportunity to impact important technical decisions across the company.
Responsibilities
Create helpful user-facing channels and cross-product experiences which drive ecosystem adoption, and add value to users across iOS, Android and desktop.
Build native iOS offering, including experiences on iPhones focused on increasing engagement with Google products and features and incorporating the latest trends in iOS development and capabilities into Googles apps.
Increase effectiveness of existing products, improving data analytics pipelines, Machine Learning (ML) capabilities, experimentation capabilities, alerting, and campaign management.
Improve products through User Experience (UX) improvement, improving latency and product quality, and experimentation related to content improvement.
Focus on iOS technologies which may also include some server-side work, including processing and analyzing data in order to draw metrics-focused conclusions.
Requirements:
Minimum qualifications:
Bachelor's degree or equivalent practical experience.
5 years of experience with software development in one or more programming languages, and data structures/algorithms.
3 years of experience testing, maintaining, or launching software products, and 1 year of experience with large-scale application design and architecture.

Preferred qualifications:
Master's degree or PhD in Computer Science or a related technical field.
3 years of experience with iOS application development.
3 years of experience with Swift or Objective-C.
1 year of experience in a technical leadership role.
Experience developing accessible technologies.
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הגשת מועמדות
עדכון קורות החיים לפני שליחה
118432
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
5 ימים
Google Israel
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Senior Design Verification Engineer, you will work as a part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.

In this role, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM) or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or ASICs.

Preferred qualifications:
Master's or PhD degree in Electrical Engineering, or a related technical field.
Experience with verification techniques, and the full verification life-cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with ASIC standard interfaces and memory system architecture.
.המשרה מיועדת לנשים ולגברים כאחד
 
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הגשת מועמדות
עדכון קורות החיים לפני שליחה
118400
שירות זה פתוח ללקוחות VIP בלבד
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
5 ימים
Google Israel
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Develop and execute comprehensive validation plans for Google's custom silicon, covering functional, performance, power, and reliability aspects.
Design and build scalable validation test infrastructure, including hardware setups, software frameworks, and automation tools on Emulation or FPGA platforms.
Lead the debugging and resolution of silicon issues, collaborating with cross-functional teams such as design, architecture, software, and firmware.
Analyze validation data to identify trends, root causes, and opportunities for improvement in silicon quality and reliability.
Build and mentor a high-performing team of silicon validation engineers, fostering a culture of collaboration, innovation, and technical excellence.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
5 years of experience in silicon validation or a related field
Experience in leading technical teams and build cross-functional relationships.
Experience in silicon validation methodologies, tools, and techniques, including hardware setups, and automation tools on Emulation or FPGA platforms.

Preferred qualifications:
Experience with Field-Programmable Gate Array (FPGA) prototyping, Hardware Emulation (e.g., ZeBu Server, Palladium, Veloce), or simulation platforms.
Experience with hardware description languages (e.g., Verilog, VHDL) and hardware verification methodologies (e.g., UVM, SystemVerilog).
Knowledge of cloud computing technologies and architectures, including data centers, networking, and storage.
Excellent communication skills, with the ability to convey technical concepts to audiences.
.המשרה מיועדת לנשים ולגברים כאחד
 
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עדכון קורות החיים לפני שליחה
118426
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
5 ימים
Google Israel
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a CPU Design Verification Engineer, you will work as part of a Research and Development team, and you will build verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers in projects and perform direct verification. You'll build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full lifecycle of verification which can range from verification planning, test execution or collecting, and closing coverage.

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog/UVM, or Specman.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Lead coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
3 years of experience verifying digital logic at RTL level using SystemVerilog, or Specman/E for FPGAs or ASICs.
Experience creating and using verification components and environments in standard verification methodology.
Experience verifying digital systems using standard IP
components/interconnects (microprocessor cores, hierarchical memory
subsystems).

Preferred qualifications:
Masters degree in Electrical Engineering, Computer Science, or related field.
Experience with UVM, SystemVerilog, or other scripting languages (e.g. Python, Perl, Shell, Bash, etc.).
Experience with CPU implementation, assembly language, or compute System on a Chip (SOC).
.המשרה מיועדת לנשים ולגברים כאחד
 
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הגשת מועמדות
עדכון קורות החיים לפני שליחה
118440
שירות זה פתוח ללקוחות VIP בלבד
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
5 ימים
Google Israel
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As an Executive CPU Design Verification Engineer, you will be a part of Research and Development team to verify digital designs, develop constrained-randomn test environments and drive system testing to closure. You will collaborate with design and verification teams, manage the verification life-cycle and uncover bugs through rigorous corner-case testing.

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities
Plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios.
Develop and refine random verification environments using SystemVerilog/UVM or Specman to ensure effective test coverage.
Define and implement various coverage measures to capture stimulus and corner-case scenarios.
Collaborate with design engineers to debug tests and ensure functional correctness of design blocks.
Drive coverage analysis to identify verification gaps and demonstrate progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience verifying digital logic at Register-Transfer Level (RTL) using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or Application-specific integrated circuit (ASICs).
Experience with Central Processing Unit (CPU) implementation, assembly language, or compute System on a Chip (SOC).
Experience verifying digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems).
Experience creating and using verification components and environments in standard verification methodology.

Preferred qualifications:
Masters degree in Electrical Engineering or Computer Science.
Experience with UVM, SystemVerilog, or other scripting languages (e.g., Python, Perl, Shell, Bash, etc.).
.המשרה מיועדת לנשים ולגברים כאחד
 
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הגשת מועמדות
עדכון קורות החיים לפני שליחה
118413
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
5 ימים
Google Israel
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a CPU Design Verification Engineer, you will work as part of a Research and Development team building verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify complex digital designs. You will collaborate with design and verification engineers in active projects and perform verification. You will be responsible for the full lifecycle of verification which can range from verification planning, test execution, or collecting and closing coverage.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Apply close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
Experience creating and using verification components and environments in standard verification methodology.
Experience verifying digital logic at Register Transfer Level (RTL) level using SystemVerilog or Specman/E for Field Programmable Gate Arrays or ASICs.

Preferred qualifications:
Masters degree in Electrical Engineering or Computer Science.
Experience with Universal Verification Methodology (UVM), SystemVerilog, or other scripting languages (e.g., Python, Perl, Shell, Bash, etc.).
Experience with CPU implementation, assembly language, or compute SOCs.
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118414
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
5 ימים
Google Israel
Location: Tel Aviv-Yafo
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and verification closure. You will verify digital designs and collaborate with design and verification engineers in projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification which can range from verification planning, test execution or collecting, and closing coverage.

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities
Plan the verification of digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with Strategic Value Add (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
4 years of experience working with design networking like Remote Direct Memory Access (RDMA) or packet processing and system design principles for low latency, throughput, security, and reliability.
Experience in creating and using verification components and environments in standard verification methodology.

Preferred qualifications:
Experience in verifying digital systems using standard Internet Protocol (IP) components or interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
Experience in Transmission Control Protocol (TCP), IP, Ethernet, PCIE and Dynamic random-access memory (DRAM), Network on Chip (NoC) principles and protocols.
Experience in estimating performance by analysis, modeling, and network simulation in defining and driving performance test plans.
Experience with verification techniques, and the full verification life-cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with ASIC standard interfaces and memory system architecture.
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שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
5 ימים
Google Israel
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities
Plan the formal verification strategy and create the properties and constraints for digital design blocks.
Utilize formal property verification tools combined with formal verification closure techniques to verify properties.
Contribute improvements to methodologies to enhance formal verification results.
Architect and implement reusable formal verification components.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
4 years of experience working in main interconnects, Direct Memory Access (DMA), controllers, and power management.
Experience capturing design specification in a temporal assertion language (e.g., System Verilog Assertions (SVA) or Property Specification Language (PSL)).

Preferred qualifications:
Master's degree or PhD in Electrical Engineering or Computer Science, or a related field.
Experience working with one or more formal verification tools (e.g., JasperGold, VC Formal, Questa Formal, or Display and Video 360).
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118434
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דיווח על תוכן לא הולם או מפלה
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
5 ימים
ironSource
Location: Tel Aviv-Yafo
Job Type: Full Time
ironSource, part of Unity, is a leading large-scale ad network at the forefront of advertising technology. We are looking for a highly skilled and experienced Senior Software Engineer to join our backend team.
In this role, you will leverage your expertise in distributed systems, data engineering, and software development to design, build, and deploy high-performance solutions. You will take a leading role in developing and maintaining a cutting-edge online machine learning system powered by PyTorch/Tensorflow models and Triton inference server.

This is an opportunity to work on complex, large-scale systems that serve billions of requests, shaping the future of ad tech and ML-driven optimization.

What you'll be doing
Architect and Build: Design, develop, and deploy robust, scalable, and high-performance distributed systems that form the backbone of ironSource's next-generation ML ad network.
Real-Time Ad Serving: Engineer and optimize critical systems for real-time ad serving, enabling machine learning models to make intelligent, low-latency decisions for optimal ad selection.
ML Infrastructure Innovation: Drive the evolution of our ML capabilities by researching, evaluating, and implementing cutting-edge techniques for feature stores, data aggregation, and model serving infrastructure.
Data Pipeline Engineering: Collaborate closely with data scientists and product managers to design, build, and maintain efficient and reliable data lakes and data pipelines, ensuring high-quality data for ML training and analytics.
Operational Excellence: Take ownership of key system components, ensuring their reliability, performance, and scalability in a production environment through proactive monitoring and continuous improvement.
Requirements:
What we're looking for
5+ years of backend development experience with strong skills and a genuine passion for server-side technologies.
Proven experience building and maintaining large-scale, low-latency, distributed systems.
Solid understanding of service lifecycle management and efficient resource utilization.
Hands-on experience with machine learning integration in production systems.
Proficiency in backend programming languages such as Java and Scala
Familiarity with cloud platforms (AWS, GCP, or Azure) and container orchestration (Docker, Kubernetes).
Strong problem-solving skills, ownership mindset, and ability to thrive in high-impact environments.
You might also have
Experience with ML frameworks such as TensorFlow, PyTorch.
Experience with inference servers such as Triton, TensorFlow Serving.
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118482
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
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שליחה
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
5 ימים
ironSource
Location: Tel Aviv-Yafo
Job Type: Full Time
Join our team working on an advanced ad-serving platform that powers millions of real-time interactions every second. As a Senior Backend Developer, youll play a key role in designing, developing, and maintaining a high-performance system that supports critical functionalities like targeting, attribution, budget management, and data pipelines for machine learning and reporting.Youll be expected to lead impactful projects, drive improvements in performance, scalability, and system reliability, and help shape solutions that directly influence the success of a globally recognized platform. We value bottom-up initiatives and encourage team members to bring their ideas to the table, fostering innovation and collaboration.
Why You'll Love This Role:

Take ownership of major projects and core features with significant business impact.
Work alongside skilled engineers in a fast-paced, high-scale environment.
Tackle challenging technical problems using cutting-edge tools like Kafka and Aerospike.
What you'll be doing
Design, develop, and monitor new features for the platform, including components supporting targeting, attribution, and budget management.
Maintain and optimize the performance of critical backend systems.
Refactor and improve legacy code to ensure scalability and efficiency.
Lead efforts to guarantee system reliability and low latency in a high-concurrency environment.
Collaborate with peers and across teams to deliver high-quality, production-ready solutions.
Requirements:
What we're looking for
Proficiency in backend development with Scala (highly preferred) or Java.
Strong understanding of distributed systems and real-time, high-concurrency applications.
Experience with Kafka and other streaming/messaging systems.
Extensive experience debugging and optimizing high-scale production environments.
Proven ability to design and build backend systems focused on performance and scalability.
You might also have
Hands-on experience with Aerospike or other NoSQL databases.
Familiarity with Kubernetes or container orchestration tools.
Knowledge of functional programming paradigms.
If you're looking for a role where you can contribute meaningfully, tackle exciting challenges, and work with a friendly, professional team that values collaboration and expertise, wed love to hear from you!
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