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Cisco Silicon One is the only unifying architecture enabling customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio.

What You'll Do

You will join Cisco Software SiliconOne team, a dynamic team at Cisco develop Core Software technologies at the heart of tomorrow's leading Silicon Network technology.

You will be part of the software development and design team for new, evolving projects, through high-level algorithms, understanding our Software and Firmware

In this role, you will:

Design and develop software a newly software interfaces for out customer use

Gain intimate knowledge of world-class silicon and programming models

Work in close collaborating with SiliconOne Software and customers facing teams to meet the needs derived from our customers

Responsible for learning and understanding customer requirements, with direct impact on SiliconOne product

Learn about needs and solution which are parts of new evolving Network technologies

Work with architecture and design teams to define the next generation of ASIC products being developed

Who You will Work With

Our unique Software, ASIC development and architect teams works in a startup atmosphere inside a stable and leading corporate

Our R&D center is very unique, hosting all silicon HW and SW development disciplines inside one team

Your role will enable you interaction with the entire team while working closely and directly with our customers and customers team

You'll be joining Cisco Silicon One team which is the center of Ciscos SW and ASIC design

The Internet, data-centers now has a new faster, better, safer engine!

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

As a CPU Design Verification Engineer, you will work as part of a Research and Development team, and you will build verification components, constrained-random testing, system testing, and verification closure.

As part of our server chip design team, you will verify complex digital designs. You will collaborate closely with design and verification engineers in projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the life-cycle of verification which can range from verification planning, test execution or collecting, and closing coverage.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities
Plan the verification of digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog/UVM, or Specman.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and show progress towards tape-out.

required PHY Firmware Engineer
What You'll Do

Youll be joining the PHY system team at Cisco Silicon One group as part of the silicon development at Cisco.

Our team deals with PHY and system aspects of the device: PHY FW, calibrations, system definitions and operations and post-silicon validation

We use latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.

Who You'll Work With

Leaba semiconductor was acquired by Cisco a few years ago and now is the center of Ciscos ASIC design group.

You'll be part of our Group driving our game changing next generation network devices - Cisco Silicon One. Our unique team works in a startup atmosphere inside a stable and leading corporate

Our design center is very unique - hosting all silicon HW and SW development disciplines inside one site.

We are transforming the industry and building a new internet for the 5G era, providing a unified, programmable silicon architecture that is the foundation of all Cisco's future routing products.

Our devices are designed to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms. Our devices deliver high speed without sacrificing programmability, buffering, power efficiency, scale or feature flexibility.